Several factors in the development of computer systems and electronic circuits such as microprocessor chips, printed circuit boards, and electronic packaging contribute to the need for lower impedances over a wide bandwidth in the power distribution networks of these systems. Decreasing power supply levels, signal transition times and die sizes, and the steady increase of power supply currents and clock speeds all require the power distribution network to have very low impedance levels. The typical target impedance for computer systems have decreased by a factor of five every two years. Low impedance in the milliohm and sub-milliohm range is desirable to minimize noise generation, electromagnetic radiation and interference.
While techniques to verify signal integrity of high-speed signals have been widely available, the need to accurately measure very low impedances in the milliohm and sub-milliohm ranges at high frequencies remains unsatisfied. Time-domain reflectometry instruments have been used to measure power distribution network impedances. However, time-domain reflectometry measurements are not suitable for measuring milliohm range impedances due to the noise and nonlinearity of the oscilloscope used in this method. RLC (resistance, inductance and capacitance) meters cannot measure sub-ohm impedances at hundreds of megahertz frequencies. Vector network analyzers have also been used to measure circuit parameters, however they can only access exterior points of a semiconductor chip and cannot measure interior impedances. Furthermore, vector network analyzers measure impedance by supplying and forcing a current into the system, but the current cannot be pushed through the circuit uniformly and achieve satisfactory measurements. A common disadvantage of these conventional methodologies also includes the inability to obtain on-die impedance measurement during system operations.